Simulation of Gate Tunneling Current in Metal–Insulator–Metal Capacitor with Multi layer High-$\kappa$ Dielectric Stack Using the Non-equilibrium Green’s Function Formalism
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概要
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In this paper, we present a one-dimensional (1D) simulation study of gate leakage current in metal–insulator–metal (MIM) capacitors using the non-equilibrium Green’s function (NEGF) formalism. The simulation code has been used to calculate tunneling transmission probability and tunneling current through multi layer gate stacks with various high-permittivity (high-$\kappa$) dielectric materials. Quantum–mechanical (NEGF) results are compared with the results of Wentzell–Kramers–Brillouin (WKB) classical approximation for different equivalent oxide thicknesses (EOTs) in numerous gate stacks such as single-SiO2-layer devices or double-layer (SiO2 + high-$\kappa$) structures. Quantum simulation shows that the conduction band offset between oxides induces wave-function reflections against barrier discontinuities, which significantly affect the transport of electrons and thus gate leakage current, particularly in double-layer high-$\kappa$ gate dielectric stacks. The study of various high-$\kappa$ dielectrics also shows that gate leakage current strongly depends not only on material properties such as dielectric constant, effective mass, and conduction band offset, but also on interfacial oxide (SiO2) layer thickness.
- 2009-11-25
著者
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Moreau Mathieu
IM2NP, CNRS (UMR 6242), Bât. IRPHE, 49 rue Joliot-Curie, BP 146, F-13384 Marseille Cedex 13, France
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Moreau Mathieu
IM2NP-CNRS (UMR 6242), Bât. IRPHE, 49 rue Joliot-Curie, BP 146, F-13384 Marseille Cedex 13, France
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Munteanu Daniela
IM2NP, CNRS (UMR 6242), Bât. IRPHE, 49 rue Joliot-Curie, BP 146, F-13384 Marseille Cedex 13, France
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Munteanu Daniela
IM2NP-CNRS (UMR 6242), Bât. IRPHE, 49 rue Joliot-Curie, BP 146, F-13384 Marseille Cedex 13, France
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Autran Jean-Luc
IM2NP, CNRS (UMR 6242), Bât. IRPHE, 49 rue Joliot-Curie, BP 146, F-13384 Marseille Cedex 13, France
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Autran Jean-Luc
IM2NP-CNRS (UMR 6242), Bât. IRPHE, 49 rue Joliot-Curie, BP 146, F-13384 Marseille Cedex 13, France
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- Simulation of Gate Tunneling Current in Metal–Insulator–Metal Capacitor with Multi layer High-$\kappa$ Dielectric Stack Using the Non-equilibrium Green’s Function Formalism