Effects of Fabrication Parameters on the Electrical Stability of Gate Overlapped Lightly Doped Drain Polysilicon Thin-Film Transistors

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概要

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• We analysed the electrical characteristics and the stability of gate overlapped lightly doped drain (GOLDD) thin-film transistors (TFTs) with different channel length, n- region doping concentration and lateral doping profile at the junctions. A reduction of kink effect and an increase of device stability have been observed with the increase of the lateral doping profile. These results are explained by numerical simulation of electrical characteristics and hot carrier induced degradation. We found that different doping profiles produce, after bias stress, different interface state distributions across the channel/n- and n-/n+ junctions.

• Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
• 2006-05-30

著者

• Rapisarda M.

  IFN-CNR, Via Cineto Romano 42, 00156 Roma, Italy

• Mariucci L.

  IFN-CNR, Via Cineto Romano 42, 00156 Roma, Italy

• Fortunato G.

  IFN-CNR, Via Cineto Romano 42, 00156 Roma, Italy

• Bonfiglietti A.

  IFN-CNR, Via Cineto Romano 42, 00156 Roma, Italy

• Valletta A.

  IFN-CNR, Via Cineto Romano 42, 00156 Roma, Italy

関連論文

• Effects of Fabrication Parameters on the Electrical Stability of Gate Overlapped Lightly Doped Drain Polysilicon Thin-Film Transistors
• Modelling Velocity Saturation Effects in Polysilicon Thin-Film Transistors

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