Endurance and Data Retention Improvement of Silicon–Oxide–Nitride–Oxide–Silicon Nonvolatile Semiconductor Memory Devices with Partially Bottom-Silicon-Rich Nitride Structure

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概要

• 論文の詳細を見る

• A significant reliability improvement in silicon–oxide–nitride–oxide–silicon (SONOS) flash memory devices by band-gap engineering of the nitride layer has been attained. The gradually varied reaction gas flow rate during deposition has generated special nitride films with non uniform composition profiles and band gaps. As a result, SONOS devices with partially Si-rich nitride structures have exhibited superior cycling endurance, radiation hardness, and data retention compared with devices with a uniform standard nitride. The marked improvement can be attributed to the increased charge-trapping/detrapping efficiency of the nitride layer since a significant number of highly accessible trapping levels have been created in the nitride that has a graded band gap. In addition, the deepened barrier heights between the nitride and its surrounding oxides may also reduce undesirable charge-loss probability and assist in charge storage. Because the dimension of flash memory cells is continuously shrinking, the proposed technique will be valuable for mass storage applications.

• Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
• 2005-09-15

著者

• Kao Chin-hsing

  Department Of Applied Physics Chung-cheng Institute Of Technology National Defense University

• Wu Kuo-Hong

  Semiconductor Laboratory, Chung-Cheng Institute of Technology, National Defense University, Tahsi, Taoyuan, 335, Taiwan, R.O.C.

• Chang Jui-Wen

  Semiconductor Laboratory, Chung-Cheng Institute of Technology, National Defense University, Tahsi, Taoyuan, 335, Taiwan, R.O.C.

• Chien Hua-Ching

  School of Defense Science, Chung-Cheng Institute of Technology, National Defense University, Tahsi, Taoyuan, 335, Taiwan, R.O.C.

• Kao Chin-Hsing

  Department of Applied Physics, Chung-Cheng Institute of Technology, National Defense University, Tahsi, Taoyuan, 335, Taiwan, R.O.C.

• Chen Tung-Sheng

  Semiconductor Laboratory, Chung-Cheng Institute of Technology, National Defense University, Tahsi, Taoyuan, 335, Taiwan, R.O.C.

関連論文

• Deposition-Temperature Effect on Nitride Trapping Layer of Silicon–Oxide–Nitride–Oxide–Silicon Memory
• High-$Q$ Spiral Inductor Design on Silicon Substrate
• Endurance and Data Retention Improvement of Silicon–Oxide–Nitride–Oxide–Silicon Nonvolatile Semiconductor Memory Devices with Partially Bottom-Silicon-Rich Nitride Structure

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