Atomistic Approach for Nanoscale Devices at the Scaling Limit and Beyond— Valley Splitting in Si

スポンサーリンク

概要

• 論文の詳細を見る

• Band-structure effects on channel carrier density in the ultrathin-body end of the ITRS roadmap silicon (100) n-type metal oxide semiconductor field effect transistors (MOSFETs) are assessed here using a semi-empirical nearest-neighbor sp3d5s* tight-binding model with spin-orbit interaction. The calculations focus on the body thickness range between 10 and 18 atomic layers (${\sim}1.5--2.5$ nm). At this range, the standard effective mass approach is limited by its inability to capture the conduction band nonparabolicity effects and the subband splitting. The tight-binding simulations show interesting effects of ground-state subband splitting in this thickness range, and as a result of this, the channel charge density was found to fluctuate by as much as 30%. Additionally, it was observed that strict process tolerance is necessary in this thickness range in order to maintain an acceptable threshold voltage variation.

• Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
• 2005-04-15

著者

• Rahman Anisur

  School Of Ece Network For Computational Nanotechnology Purdue University

• Lundstrom Mark

  School Of Ece Network For Computational Nanotechnology Purdue University

• Vagidov Nizami

  Department Of Ee State University Of New York

• Boykin Timothy

  Department Of Elec. And Comp. Engineering University Of Alabama

• Klimeck Gerhard

  School Of Ece Network For Computational Nanotechnology Purdue University

• Rahman Anisur

  School of Electrical and Computer Engineering, Network for Computational Nanotechnology Purdue University, West Lafayette, IN 47907, USA

• Lundstrom Mark

  School of Electrical and Computer Engineering, Network for Computational Nanotechnology Purdue University, West Lafayette, IN 47907, USA

• Vagidov Nizami

  Department of Electrical Engineering, State University of New York, Buffalo, NY 14260, USA

関連論文

• Nanoscale Device Simulation at the Scaling Limit and Beyond
• Atomistic Approach for Nanoscale Devices at the Scaling Limit and Beyond-Valley Splitting in Si
• Device Physics of Sub-100nm Transistors
• Asymmetrically Doped GaAs/AlGaAs Double-Quantum-Well Structure for Voltage-Tunable Infrared Detection
• Atomistic Approach for Nanoscale Devices at the Scaling Limit and Beyond— Valley Splitting in Si

スポンサーリンク