Device Physics of Sub-100nm Transistors
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概要
- 論文の詳細を見る
- 2001-09-25
著者
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Lundstrom Mark
School Of Ece Network For Computational Nanotechnology Purdue University
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Lundstrom Mark
School Of Electrical And Computer Engineering Purdue University
関連論文
- Nanoscale Device Simulation at the Scaling Limit and Beyond
- Atomistic Approach for Nanoscale Devices at the Scaling Limit and Beyond-Valley Splitting in Si
- Device Physics of Sub-100nm Transistors
- Atomistic Approach for Nanoscale Devices at the Scaling Limit and Beyond— Valley Splitting in Si