Thin Copper Seed Layers in Interconnect Metallization Using the Electroless Plating Process
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概要
- 論文の詳細を見る
In this paper, we present a process for growing a Cu seed layer on a Ta/SiO2/Si substrate using an electroless plating (ELP) process at an extremely low temperature (${\sim}30$°C). In this process, the activation treatment of the Ta/SiO2/Si substrate was carried out by immersion in a PdCl2/HCl solution prior to electroless Cu deposition. The optimum activation time for the substrate was clearly observed to be 7 min. The Cu seed layer was uniformly and smoothly deposited using a CuSO4 concentration of 30 mM for 80 s with an average roughness of 14 nm under a thin film of 50 nm thickness. The grain size of the Cu seed layer was 34 nm. After annealing in hydrogen ambience at 250–350°C, the average roughness of the Cu seed layer was reduced to 4 nm. A proposed mechanism for the ELP of Cu seed layers on Ta/SiO2/Si substrates is also presented.
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2004-08-15
著者
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Huang Chien-jung
Department Of Applied Physics National University Of Kaohsiung
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Meen Teen-hang
Department Of Electrical Engineering Southern Taiwan University Of Technology
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Chen Wen
Department Of Anatomy And Cell Biology College Of Medicine National Taiwan University
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Meen Teen-Hang
Department of Electrical Engineering, Southern Taiwan University of Technology, 1 Nan-Tai St., Yung-Kang City, Tainan, Taiwan 70101, R.O.C.
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Chiu Chih-Jen
Department of Electrical Engineering, Southern Taiwan University of Technology, 1 Nan-Tai St., Yung-Kang City, Tainan, Taiwan 70101, R.O.C.
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Chen Wen
Department of Electrical Engineering, Southern Taiwan University of Technology, 1 Nan-Tai St., Yung-Kang City, Tainan, Taiwan 70101, R.O.C.
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Huang Chien-Jung
Department of Electrical Engineering, Southern Taiwan University of Technology, 1 Nan-Tai St., Yung-Kang City, Tainan, Taiwan 70101, R.O.C.
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