A Sophisticated Routing Algorithm in 3D NoC with Fixed TSVs for Low Energy and Latency

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概要

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• With rapid progress in Integrated Circuit technologies, Three-Dimensional Network-on-Chips (3DNoCs) have become a promising solution for achieving low latency and low power. Under the constraint of the TSV number used in 3DNoCs, designing a proper routing algorithm with fewer TSVs is a critical problem for network performance improvement. In this work, we design a novel fully adaptive routing algorithm in 3D NoC. The algorithm consists of two parts: one is a vertical node assignment in inter-layer routing, which is a TSV selection scheme in a limited quantity of TSVs in the NoC architecture, and the other is a 2D fully adaptive routing algorithm in intra-layer routing, which combines the optimization of routing distance, network traffic condition and diversity of the path selection. Simulation results show that our proposed routing algorithm can achieve lower latency and energy consumption compared with other traditional routing algorithms.

• 一般社団法人 情報処理学会の論文

著者

• WATANABE TAKAHIRO

  Graduate School of Environmental Studies, Tohoku University

• WATANABE Takahiro

  Graduate School of Information, Productions and Systems, Waseda University

• Jiang Xin

  Graduate School of Information, Productions and Systems, Waseda University

• Zeng Lian

  Graduate School of Information, Productions and Systems, Waseda University

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