0.45-V Input Higher Than 90% Efficiency Buck Converter with On-Chip Gate Boost
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概要
- 論文の詳細を見る
A low input voltage buck converter with on-chip gate boost and digital PWM controller is proposed and fabricated in 40-nm CMOS process. The on-chip gate boost and clock gating technique are employed to achieve >90% efficiency for heavy load and light load, respectively.
- 一般社団法人電子情報通信学会の論文
- 2012-07-26
著者
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Takamiya Makoto
University Of Tokyo
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Sakurai Takayasu
University Of Tokyo
-
Chen Po-hung
The University Of Tokyo
-
Okuma Yasuyuki
Semiconductor Technology Academic Research Center (starc)
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Zhang Xin
The University Of Tokyo
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Zhang Xin
University of Tokyo
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Ryu Yoshikatsu
Semiconductor Technology Academic Research Center (STARC)
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WATANABE Kazunori
Semiconductor Technology Academic Research Center (STARC)
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Chen Po-Hung
University of Tokyo
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Ishida Koichi
University of Tokyo
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- 0.45-V Input Higher Than 90% Efficiency Buck Converter with On-Chip Gate Boost (シリコン材料・デバイス)
- 0.45-V Input Higher Than 90% Efficiency Buck Converter with On-Chip Gate Boost (集積回路)
- 0.45-V Input Higher Than 90% Efficiency Buck Converter with On-Chip Gate Boost
- 0.45-V Input Higher Than 90% Efficiency Buck Converter with On-Chip Gate Boost
- 0.45-V Input Higher Than 90% Efficiency Buck Converter with On-Chip Gate Boost
- 0.45-V Input Higher Than 90% Efficiency Buck Converter with On-Chip Gate Boost