A Hardware Accelerator for Java^<TM> Platforms on a 130-nm Embedded Processor Core(Integrated Electronics)

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概要

• 論文の詳細を見る

• We have developed a hardware accelerator for Java platforms, integrated on a SuperH microprocessor core, using a 130-nm CMOS process. The Java accelerator, a bytecode translation unit (BTU), is tightly coupled with the CPU to share resources. The BTU supports 159 basic bytecodes and 5 or 6 optional bytecodes. It supports both connected device configuration (CDC) 1.0 and connected limited device configuration (CLDC) 1.0.4 technologies. The BTU corresponds to the dual-issued superscalar CPU and applies a new method, control-sharing. With this method, the BTU always grasps the pipeline status of the CPU, and the Java program is processed by both the BTU and the CPU. To implement this method, we developed some acceleration techniques: fast branch requests, enhanced CPU instructions, Java runtime exception detection hardware, and fewer overhead cycles of handover between the BTU and the CPU. In particular, the BTU can detect Java runtime exceptions in parallel with other processing, such as an array access. With previous methods, there is a disadvantage in that CPU efficiency decreases for Java-specific processing, such as array index bounds checking. The sample chip was fabricated in Renesas 130-nm, five-layer Cu, dual-vth low-power CMOS technology. The chip runs at 216MHz and 1.2V. The BTU has 75kG. The benchmark on an evaluation board showed 6.55 embedded caffeine marks (ECM)/MHz on the CLDC 1.0.4 configuration, a tenfold speed increase without the BTU for roughly the same power consumption. In other words, power savings of 90 percent with the same performance were achieved.

• 社団法人電子情報通信学会の論文
• 2007-02-01

著者

• YAMADA Tetsuya

  Hitachi Ltd.

• Toyama Keisuke

  Hitachi Ltd.

• Irita T

  Renesas Technology Corp.

• Yoshinaga T

  Hitachi Ltd.

• IRIE Naohiko

  Hitachi Ltd.

• TSUNODA Takanobu

  Hitachi Ltd.

• IRITA Takahiro

  Renesas Technology Corp.

• KITAGAWA Kenji

  Hitachi Ltd.

• YOSHIDA Ryohei

  Renesas Technology Corp.

• SATOYAMA Motoaki

  Hitachi Ltd.

• Irie Naohiko

  Hitachi Ltd. Kokubunji‐shi Jpn

関連論文

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• A Low-Power Embedded RISC Microprocessor with an Integrated DSP for Mobile Applications(Special Issue on High-Performance and Low-Power Microprocessors)
• Multi-Core/Multi-IP Technology for Embedded Applications
• Lateral Compression Behavior of High-Strength and High-Elastic-Modulus Fibers and Influence of Environment
• A Hardware Accelerator for Java^ Platforms on a 130-nm Embedded Processor Core(Integrated Electronics)
• A 45-nm 37.3GOPS/W Heterogeneous Multi-Core SOC with 16/32 Bit Instruction-Set General-Purpose Core

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