A Low Temperature DC Characteristic Analysis Utilizing a Floating Gate Neuron MOS Macromodel
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概要
- 論文の詳細を見る
Utilizing a macromodel which calculates the floating gate potential by combining resistances and dependent voltage and current sources, DC transfer characteristics for multi-input neuron MOS inverters and for those in the neuron MOS full adder circuit are simulated both at room temperature and at 77K. Based on the simulated results, low temperature circuit failures are discussed. Furthermore, circuit design parameter optimization both for low and room temperature operations is described.
- 社団法人電子情報通信学会の論文
- 2003-06-01
著者
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Hatano Hiroshi
Department Of Applied Physics Osaka University
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Hatano Hiroshi
Department Of Materials Science Graduate School Of Science And Technology Shizuoka Institute Of Scie
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OCHIAI Tadahiro
Department of Materials Science, Graduate School of Science and Technology, Shizuoka Institute of Sc
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Ochiai Tadahiro
Department Of Materials Science Graduate School Of Science And Technology Shizuoka Institute Of Scie
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