Guided-Probe Diagnosis of LSIs Containing Macrocells(Special Issue on Test and Diagnosis of VLSI)

概要

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A novel method for the guided-probe diagnosis of high-performance LSIs containing macrocells, which have no internal netlist essential to the diagnosis, has been developed. In this method, the macrocell netlist is derived from its layout by extracting a leaf-cell-level netlist and is combined with the original one. Logic models for the leaf cells in the extracted netlist are also generated to obtain the logic-simulation data in the macrocells. The logic modeling is extended for application to memory macrocells, based on the idea that analog-behavior leaf cells in the memory macrocells are converted into logically equivalent circuits for logic simulation. Specifically, sense amplifiers and wired-or connections on bit lines are replaced with the corresponding logic-behavior models. The proposed method has been successfully applied to actual design data of LSIs containing macrocells, and it has been verified that it enables fault paths inside macrocells to be accurately traced and that the logic models give good timing resolution in the logic simulation. Using the proposed method, LSIs containing macrocells will be able to be diagnosed regardless of the macrocell types, without the need for a"golden"device, by an electron-beam guided probe system.
社団法人電子情報通信学会の論文
1998-07-25