Evaluation of Shared DRAM for Parallel Processor System with Shared Memory (Special Section on VLSI Design and CAD Algorithms)
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概要
- 論文の詳細を見る
We describe a new multiport memory which is called Shared DRAM (SHDRAM) to overcome bus-bottle neck problem in parallel processor system with shared memory. The processors are directly connected to this SHDRAM without conventional common bus. The test chip with 32 kbit memory cells is fabricated using a 1.5μm CMOS technology. The basic operation is confirmed by the circuit simulation and experimental results. In addition, it is confirmed by the computer simulation and experimental results. In addition, it is confirmed by the computer simulation that the system performance with SHDRAM is superior to that with conventional common buses.
- 社団法人電子情報通信学会の論文
- 1998-12-25
著者
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Ono T
Department Of Cell Biology Graduate School Of Medicine Tohoku University
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Kurino Hiroyuki
The Dept. Of Machine Intelligence And Systems Engineering Graduate School Of Engineering Tohoku Univ
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Ono Taizo
Department Of Cell Biology Graduate School Of Medicine Tohoku University
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HIRANO Keiichi
the Dept. of Machine Intelligence and Systems Engineering, Graduate School of Engineering, Tohoku Un
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ONO Taizo
the Dept. of Machine Intelligence and Systems Engineering, Graduate School of Engineering, Tohoku Un
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KOYANAGI Mitsumasa
the Dept. of Machine Intelligence and Systems Engineering, Graduate School of Engineering, Tohoku Un
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Ono Taizo
The Dept. Of Machine Intelligence And Systems Engineering Graduate School Of Engineering Tohoku Univ
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Hirano Keiichi
The Dept. Of Machine Intelligence And Systems Engineering Graduate School Of Engineering Tohoku Univ
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Koyanagi Mitsumasa
The Dept. Of Machine Intelligence And Systems Engineering Graduate School Of Engineering Tohoku Univ
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