Low-Voltage Sigma-Delta Modulator Topologies for Broadband Communications Applications(<Special Section>Analog Circuit and Device Technologies)

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概要

• 論文の詳細を見る

• This paper presents a novel class of sigma-delta modulator topologies for low-voltage, high-speed, and high-resolution applicationswith low oversampling ratios (OSRs). The main specifications of these architectures are the reduced analog circuit requirements, large out-of-band gain in the noise transfer function (NTF) without any stability concerns to achieve high signal to noise ratio (SNR) with a low OSR, and unity-gain signal transfer function (STF) to reduce the harmonic distortions resulted from the analog circuit imperfections. To demonstrate the efficiency of the proposed modulator architectures a prototype with HSPICE is implemented. A low-power two-stage class A/AB OTA with modified common mode feedback (CMFB) circuit in the first stage is used to implement the fourth order modulator. Simulation results with OSR of 16 give signal to noise plus distortion ratio (SNDR) and dynamic range (DR) of 90-dB and 92.5-dB including the circuit noise in the 1.25-MHz signal bandwidth, respectively. The circuit is implemented in a 0.13-μm standard CMOS technology. It dissipates about 40-mW from a single 1.2-V power supply voltage.

• 社団法人電子情報通信学会の論文
• 2004-06-01

著者

• Shoaei Omid

  Ic Design Lab. Electrical And Computer Engineering Department University Of Tehran

• Shoaei Omid

  Ic Design Center University Of Tehran

• Yavari Mohammad

  Ic Design Lab. Electrical And Computer Engineering Department University Of Tehran

• SVELTO Franceseo

  Electrical Engineering Department, University of Pavia

• Svelto Franceseo

  Electrical Engineering Department University Of Pavia

関連論文

• Analysis of the Clock Jitter Effects in a Time Invariant Model of Continuous Time Delta Sigma Modulators( Analog Circuit Techniques and Related Topics)
• A New Method for Elimination of the Clock Jitter Effects in Continuous Time Delta-Sigma Modulators(Nonlinear Theory and its Applications)
• A Simplified Illustration of Arbitrary DAC Waveform Effects in Continuous Time Delta-Sigma Modulators(VLSI Design and CAD Algorithms)
• Low-Voltage Sigma-Delta Modulator Topologies for Broadband Communications Applications(Analog Circuit and Device Technologies)
• Hybrid Cascode Compensation for Two-Stage CMOS Opamps(Building Block, Analog Circuit and Device Technologies)
• A Reduced-Sample-Rate Sigma-Delta-Pipeline ADC Architecture for High-Speed High-Resolution Applications(Analog Circuit and Device Technologies)
• A New Infrastructure for Digital Pre-Filtering in Multi-bit Continuous Time Delta Sigma Modulators(Electronic Circuits)

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