Random Modulation: Multi-Threshold-Voltage Design Methodology in Sub-2-V Power Supply CMOS (Special Issue on Low-power LSIs and Technologies)
スポンサーリンク
概要
- 論文の詳細を見る
Random modulation refers to the changing of the MOSFET threshold voltage cell by cell. This paper claims it is essential in sub-2-V CMOS design because it reduces the subthreshold leakage current even in the active and sleep modes as wel as in the stand-by mode. We found that a gradated modulation scheme, which gradually changes the ratio of low-V_<TH> cells according to the path-delay, is the best approach. To achieve the minimal leakage current, the way of determining the optimum pair of threshold voltages is also described. Experimental results for microprocessor show that gradated modulation reduces sub-threshold leakage current by 75% to 90% compared to conventional single-low-threshold voltage design without degrading the performance of the circuits.
- 社団法人電子情報通信学会の論文
- 2000-11-25
著者
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Yano K
Central Research Laboratory Hitachi Ltd.
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Yano Kazuo
The Central Research Laboratory Hitachi Ltd.
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Kato Naoki
The Central Research Laboratory Hitachi Ltd.
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Kato N
Graduate School Of Information Sciences Tohoku University
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Yano K
The Central Research Laboratory Hitachi Ltd.
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AKITA Yohei
the Central Research Laboratory, Hitachi Ltd.
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HIRAKI Mitsuru
the Semiconductor & Integrated Circuits, Hitachi Ltd.
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YAMASHITA Takeo
the Device Development Center, Hitachi Ltd.
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SHIMIZU Teruhisa
the Device Development Center, Hitachi Ltd.
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MAKI Fuyuhiko
the Hitachi ULSI Systems Co. Ltd.
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Hiraki M
The Semiconductor & Integrated Circuits Hitachi Ltd.
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Akita Yohei
The Central Research Laboratory Hitachi Ltd.
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Shimizu Teruhisa
The Device Development Center Hitachi Ltd.
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Yamashita Takeo
The Device Development Center Hitachi Ltd.
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