Single-Electron Logic Systems Based on the Binary Decision Diagram (Special Issue on Technology Challenges for Single Electron Devices)
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概要
- 論文の詳細を見る
This paper proposes a method of constructing single-electron logic subsystems on the basis of the binary decision diagram (BDD). Sample subsystems, an adder and a comparator, are designed by combining single-electron BDD devices. It is demonstrated by computer simulation that the designed subsystems successfully produce, through pipelined processing, an output data flow in response to the input data flow. The operation error caused by thermal agitation is estimated. An output interface for converting single-electron transport into binary-voltage signals is also designed.
- 社団法人電子情報通信学会の論文
- 1998-01-25
著者
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Amemiya Yoshihito
Faculty Of Engineering Hokkaido University
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ASAHI Noboru
Faculty of Engineering, Hokkaido University
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Asahi Noboru
Faculty Of Engineering Hokkaido University
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Akazawa Masamichi
Faculty Of Engineering Hokkaido University
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