Very-High-Speed Analog Neural Network LSI Using Super Self-Aligned Si Bipolar Process Technology
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概要
- 論文の詳細を見る
A very-high-speed ten-neuron analog neural network LSI chip is fabricated for the first time using super self-aligned Si bipolar process technology. The LSI consists of ten neurons and 100 electrically modifiable synaptic weights. The neural network nonlinear mapping function to solve the four-bit parity problem is successfully demonstrated at 150 mega-patterns/sec. The operation speed of this neural network is, to the best of the authors, knowledge, the fastest yet reported.
- 社団法人電子情報通信学会の論文
- 1994-06-25
著者
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Amemiya Yoshihito
Faculty Of Engineering Hokkaido University
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Aisawa Shigeki
Ntt Transmission Systems Laboratories
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Koga Masafumi
Ntt Transmission Systems Laboratories
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Matsumoto Takao
NTT Transmission Systems Laboratories
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Noguchi Kazuhiro
NTT Transmission Systems Laboratories
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