A Clock-Feedthrough and Offset Compensated Fully-Differential Switched-Current Circuit
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概要
- 論文の詳細を見る
A fully-differential switched-current (SI) circuit provided with clock-feedthrough (CFT) and common mode rejection and offset compensation schemes is described. Different from a conventional SI memory cell, it takes the difference between two differential inputs to deliver the balanced differential currents. Transistor level simulations and error analyses are given to demonstrate its performance.
- 社団法人電子情報通信学会の論文
- 1995-11-25
著者
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WATANABE Kenzo
Research Institute of Electronics, Shizuoka University
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Watanabe Kenzo
Research Institute Of Electronics Shizuoka University
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CHA Hyeong-Woo
the Research Institute of Electronics, Shizuoka University
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CHA Hyeong-Woo
Research Institute of Electronics, Shizuoka University
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Cha H‐w
Chongju Univ. Chongju Kor
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Hyeong-Woo Cha
Research Institute of Electronics, Shizuoka University
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Watanabe Kenzo
Research Institute Of Electronics
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