Class A CMOS Current Conveyors

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概要

• 論文の詳細を見る

• The second-generation CMOS current conveyors are developed for high-frequency analog signal processing. It consists of a source follower for the voltage input and a regulated current mirror for the current input and output. The voltage and current input stages are also coupled by a current mirror to reduce the impedance of the current input port. Simulations show that this architecture provides the high input/output conductance ratio and the inherent voltage and current transfer bandwidths extending beyond 100MHz. The prototype chips fabricated using 0.6 μm CMOS process have confirmed the simulated performances, though the voltage and current bandwidth are limited to 20 MHz and 35 MHz, respectively, by the built-in capacitances of the bonding pads.

• 社団法人電子情報通信学会の論文
• 1998-06-25

著者

• WATANABE Kaoru

  The author is with Osaka Electro-Communication University

• Watanabe Kenzo

  The Research Institute Of Electronics Shizuoka University

• Watanabe Kenzo

  The Reesearch Institute Of Electronics Shizuoka University

• Watanabe K

  Graduate School Of Information Science Nara Institute Of Science And Technology

• OGAWA Satomi

  Research Institute of Electronics, Shizuoka University

• CHA Hyeong-Woo

  the Research Institute of Electronics, Shizuoka University

• OGAWA Satomi

  the Research Institute of Electronics, Shizuoka University

• Ogawa S

  Research Institute Of Electronics Shizuoka University

• Ogawa Satomi

  The Research Institute Of Electronics Shizuoka University

• Cha H‐w

  Chongju Univ. Chongju Kor

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