Gate Overlapped Raised Extension Structure (GORES) MOSFET by Using In-situ Doped Selective Si Epitaxy
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概要
- 論文の詳細を見る
- 2005-09-13
著者
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FUJITA S.
Semiconductor Technology Development Group, Semiconductor Solutions Network Company, Sony Corporatio
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IWAMOTO H.
Semiconductor Technology Development Group, Semiconductor Solutions Network Company, Sony Corporatio
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KADOMURA S.
Semiconductor Technology Development Group, Semiconductor Solutions Network Company, Sony Corporatio
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Kadomura S.
Technology Development Division Semiconductor Business Group Sony Corporation
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WANG J.
Semiconductor Technology Development Division, Semiconductor Business Group, Sony Corporation
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TATESHITA Y.
Semiconductor Technology Development Division, Semiconductor Business Group, Sony Corporation
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SAITO M.
Semiconductor Technology Development Division, Semiconductor Business Group, Sony Corporation
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NAGASHIMA N.
Semiconductor Technology Development Division, Semiconductor Business Group, Sony Corporation
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TAI K.
Technology Development Division, Semiconductor Business Group, Sony Corporation
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TATESHITA Y.
Technology Development Division, Semiconductor Business Group, Sony Corporation
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IWAMOTO H.
Technology Development Division, Semiconductor Business Group, Sony Corporation
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IMOTO T.
Semiconductor Technology Development Group, Semiconductor Solutions Network Company, Sony Corporatio
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KIKUCHI Y.
Semiconductor Technology Development Group, Semiconductor Solutions Network Company, Sony Corporatio
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KATAOKA T.
Semiconductor Technology Development Group, Semiconductor Solutions Network Company, Sony Corporatio
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MIYANAMI Y.
Semiconductor Technology Development Group, Semiconductor Solutions Network Company, Sony Corporatio
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IKEDA H.
Semiconductor Technology Development Group, Semiconductor Solutions Network Company, Sony Corporatio
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LANDIN T.
ASM America Inc.
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ARENA C.
ASM America Inc.
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OHNO T.
Semiconductor Technology Development Group, Semiconductor Solutions Network Company, Sony Corporatio
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KOBAYASHI T.
Semiconductor Technology Development Group, Semiconductor Solutions Network Company, Sony Corporatio
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Miyanami Y.
Semiconductor Technology Development Group Semiconductor Solutions Network Company Sony Corporation
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Tateshita Y.
Technology Development Division Semiconductor Business Group Sony Corporation
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Tai K.
Technology Development Division Semiconductor Business Group Sony Corporation
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Kazi S.
Technology Development Division Semiconductor Business Group Sony Corporation
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Imoto T.
Semiconductor Technology Development Group Semiconductor Solutions Network Company Sony Corporation
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Iwamoto H.
Technology Development Division Semiconductor Business Group Sony Corporation
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Nagashima N.
Technology Development Division Semiconductor Business Group Sony Corporation
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- Gate Overlapped Raised Extension Structure (GORES) MOSFET by Using In-situ Doped Selective Si Epitaxy