Sub-μm Silicon SETs on Self-Undulated Hyper-Thin SOI Films
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概要
- 論文の詳細を見る
- 1999-09-20
著者
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UCHIDA K.
Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation
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KOGA J.
Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation
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Toriumi A.
Advanced Lsi Technology Laboratory Toshiba Corporation
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TAKAGI S.
Advanced LSI Technology Laboratory, Toshiba Corporation
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OHBA R.
Advanced LSI Technology Laboratory, Toshiba Corporation
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Ohba R.
Advanced Lsi Technology Laboratory Toshiba Corporation
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Koga J.
Advanced Lsi Technology Laboratory Toshiba Corporation
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- New Approach to Negative Differential Conductance with High Peak-to-Valley Ratio in Silicon
- Proposal of Analytical Single-Electron Transistor Model and Its Implication for Realistic Circuit Operation
- Sub-μm Silicon SETs on Self-Undulated Hyper-Thin SOI Films
- Room Temperature Operating CMOS-like Logic Circuits with Single Electron Tunneling Devices
- Bandgap Engineering for the Suppression of the Short Channel Effect of sub-0.1um p-channel MOSFETs