Toriumi A. | Advanced Lsi Technology Laboratory Toshiba Corporation

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著作論文

New Approach to Negative Differential Conductance with High Peak-to-Valley Ratio in Silicon
Proposal of Analytical Single-Electron Transistor Model and Its Implication for Realistic Circuit Operation
Sub-μm Silicon SETs on Self-Undulated Hyper-Thin SOI Films
Room Temperature Operating CMOS-like Logic Circuits with Single Electron Tunneling Devices

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