Room Temperature Operating CMOS-like Logic Circuits with Single Electron Tunneling Devices

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概要

• 論文の詳細を見る
• 1998-09-07

著者

• UCHIDA K.

  Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation

• Toriumi A.

  Advanced Lsi Technology Laboratory Toshiba Corporation

• MATSUZAWA K.

  Advanced LSI Technology Laboratory, Toshiba Corporation

• Matsuzawa K.

  Advanced Lsi Technology Laboratory Toshiba Corporation

関連論文

• Successful CMOS Operation of Dopant-Segregation Schottky Barrier Transistors (DS-SBTs)
• New Approach to Negative Differential Conductance with High Peak-to-Valley Ratio in Silicon
• Proposal of Analytical Single-Electron Transistor Model and Its Implication for Realistic Circuit Operation
• Sub-μm Silicon SETs on Self-Undulated Hyper-Thin SOI Films
• Room Temperature Operating CMOS-like Logic Circuits with Single Electron Tunneling Devices
• Bandgap Engineering for the Suppression of the Short Channel Effect of sub-0.1um p-channel MOSFETs

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