Self-Adaptive Algorithmic/Architectural Design for Real-Time, Low-Power Video Systems(Adaptive Signal Processing, <Special Section>Recent Advances in Circuits and Systems-Part 1)

スポンサーリンク

概要

• 論文の詳細を見る

• With reference to video motion estimation in the framework of the new H.264/AVC video coding standard, this paper presents algorithmic and architectural solutions for the implementation of context-aware coprocessors in real-time, low-power embedded systems. A low-complexity context-aware controller is added to a conventional Full Search (FS) motion estimation engine. While the FS coprocessor is working, the context-aware controller extracts from the intermediate processing results information related to the input signal statistics in order to automatically configure the coprocessor itself in terms of search area size and number of reference frames; thus unnecessary computations and memory accesses can be avoided. The achieved complexity saving factor ranges from 2.2 to 25 depending on the input signal while keeping unaltered performance in terms of motion estimation accuracy. The increased efficiency is exploited both for (i) processing time reduction in case of software implementation on a programmable platform; (ii) power consumption reduction in case of dedicated hardware implementation in CMOS technology.

• 社団法人電子情報通信学会の論文
• 2005-07-01

著者

• Fanucci Luca

  Univ. Pisa Pisa Ita

• Fanucci Luca

  Cnr-ieiit

• Saponara Sergio

  Univ. Of Pisa Pisa Ita

• Fanucci Luca

  Department Of Information Engineering University Of Pisa Via G. Caruso

• Saponara Sergio

  Department Of Information Engineering University Of Pisa Via G. Caruso

• TERRENI Pierangelo

  Department of Information Engineering, University of Pisa Via G. Caruso

• FANUCCI Luca

  Dept. of Information Engineering, the University of Pisa

• SAPONARA Sergio

  Dept. of Information Engineering, the University of Pisa

• MELANI Massimiliano

  Dept. of Information Engineering, the University of Pisa

• TERRENI Pierangelo

  Dept. of Information Engineering, the University of Pisa

• Terreni Pierangelo

  Department Of Information Engineering University Of Pisa Via G. Caruso

• Melani Massimiliano

  Dept. Of Information Engineering The University Of Pisa

関連論文

• Automatic Synthesis of Cost Effective FFT/IFFT Cores for VLSI OFDM Systems
• Self-Adaptive Algorithmic/Architectural Design for Real-Time, Low-Power Video Systems(Adaptive Signal Processing, Recent Advances in Circuits and Systems-Part 1)
• Power Optimization of an 8051-Compliant IP Microcontroller(Low-Power LSI and Low-Power IP)
• High-Throughput Multi-Rate Decoding of Structured Low-Density Parity-Check Codes(VLSI Architecture, VLSI Design and CAD Algorithms)

スポンサーリンク