VLSI Architecture for 2-D 3-Level Lifting-Based Discrete Wavelet Transform

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概要

• 論文の詳細を見る
• 2004-01-01

著者

• Chen Pei-yin

  Department Of Computer Science And Information Engineering National Cheng Kung University

• Chen Pei-yin

  Department Of Electronic Engineering Southern Taiwan University Of Technology

関連論文

• VLSI Architecture for 2-D 3-Level Lifting-Based Discrete Wavelet Transform
• VLSI Implementation for Fuzzy Membership-Function Generator
• An Efficient VLSI Architecture of 1-D Lifting Discrete Wavelet Transform(Integrated Electronics)
• A Low-Complexity Interpolation Method for Deinterlacing(Image Processing and Video Processing)
• A Low-Cost CAVLC Encoder(Electronic Circuits)
• VLSI Architecture for 2-D 3-Level Lifting-Based Discrete Wavelet Transform (VLSI Design Technology and CAD)
• VLSI Implementation of Lifting Discrete Wavelet Transform Using the 5/3 Filter(Regular Section)

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