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The Department Of Computer And Mathematical Sciences Graduate School Of Information Sciences Tohoku | 論文
- Systematic Interpretation of Redundant Arithmetic Adders in Binary and Multiple-Valued Logic(Novel Device Architectures and System Integration Technologies)
- A Single-Electron-Transistor Logic Gate Family for Binary, Multiple-Valued and Mixed-Mode Logic(New System Paradigms for Integrated Electronics)
- A Simulation Methodology for Single-Electron Multiple-Valued Logics and Its Application to a Latched Parallel Counter
- Score-Level Fusion of Phase-Based and Feature-Based Fingerprint Matching Algorithms
- A Robust 3D Face Recognition Algorithm Using Passive Stereo Vision
- A Redox Microarray : An Experimental Model for Molecular Computing Integrated Circuits(New System Paradigms for Integrated Electronics)
- Arithmetic Circuit Verification Based on Symbolic Computer Algebra
- Formal Design of Arithmetic Circuits Based on Arithmetic Description Language(Circuit Synthesis,VLSI Design and CAD Algorithms)
- A Shortest Path Search Algorithm Using an Excitable Digital Reaction-Diffusion System (Signal Processing Algorithm, Multidimensional Signal Processing and Its Application)
- High-Accuracy Estimation of Image Rotation Using 1D Phase-Only Correlation
- A Passive 3D Face Recognition System and Its Performance Evaluation
- A Palmprint Recognition Algorithm Using Phase-Only Correlation
- A Fingerprint Matching Algorithm Using Phase-Only Correlation(Digital Signal Processing for Pattern Recognition)(Applications and Implementations of Digital Signal Processing)
- High-Accuracy Subpixel Image Registration Based on Phase-Only Correlation(Digital Signal Processing)
- A RECOGNITION TECHNIQUE OF ROAD SIGNS BY TRACING OUTLINE VECTORS (Computer Vision, Medical Applications and Networked MM)(International Workshop On Advanced Image Technology (IWAIT2004))
- Low-Power Field-Programmable VLSI Using Multiple Supply Voltages(Low Power Methodology, VLSI Design and CAD Algorithms)
- Field-Programmable VLSI Based on a Bit-Serial Fine-Grain Architecture(New System Paradigms for Integrated Electronics)
- Highly-Parallel Stereo Vision VLSI Processor Based on an Optimal Parallel Memory Access Scheme
- An FPGA-Oriented Motion-Stereo Processor with a Simple Interconnection Network for Parallel Memory Access
- Architecture of a high-performance stereo vision VLSI processor