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School of Electrical Engineering and Computer Science, Kyungpook National Univ. | 論文
- 2-bit/cell Characteristics of High-Density and High-Performance SONOS Flash Memory Cell with Recessed Channel Structure
- Device Design Consideration for 50nm Dynamic Random Access Memory Using Bulk FinFET
- Characteristics of Locally-Separated Channel FinFETs with Non-Overlapped Source/Drain to Gate for Sub-50nm DRAM Cell Transistors(Session2: Silicon Devices I)
- Characteristics of Locally-Separated Channel FinFETs with Non-Overlapped Source/Drain to Gate for Sub-50nm DRAM Cell Transistors(Session2: Silicon Devices I)
- Device Design of SONOS Flash Memory Cell with Saddle Type Channel Structure
- Two-Bit/Cell Programming Characteristics of High-Density NOR-Type Flash Memory Device with Recessed Channel Structure and Spacer-Type Nitride Layer
- Modified Saddle MOSFETs for Sub-50nm DRAM Technology(Session 1 Silicon Devices I,AWAD2006)
- Gate Workfunction Engineering of Bulk FinFETs for Sub-50nm DRAM Cell Transistors