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Nano-bio Electronic Devices Team Electronics And Telecommunications Research Institute | 論文
- Fabrication of Two-Layer stacked Poly-Si TFT CMOS Inverters Using Laser Crystallized channel with metal gate on Si Substrate
- SOI-Based Nanoscale CMOS Device Technology(Session 6A Silicon Devices III,AWAD2006)
- Analysis of Interface Property of SiGe-On-Insulator (SGOI) Substrate with a Strained-Si Layer for Nano-CMOS Device Applications(Session 4 Silicon Devices II,AWAD2006)
- SOI-Based Nanoscale CMOS Device Technology(Session 6A Silicon Devices III,AWAD2006)
- Analysis of Interface Property of SiGe-On-Insulator (SGOI) Substrate with a Strained-Si Layer for Nano-CMOS Device Applications(Session 4 Silicon Devices II,AWAD2006)
- SOI-Based Nanoscale CMOS Device Technology
- Analysis of Interface Property of SiGe-On-Insulator (SGOI) Substrate with a Strained-Si Layer for Nano-CMOS Device Applications
- Analysis of Interface Property of SiGe-On-Insulator (SGOI) Substrate with a Strained-Si Layer for Nano-CMOS Device Applications
- Ultra-Shallow Junction Formation using Novel Plasma Doping Technology beyond 50nm MOS Devices
- A Two-Layer Stacked Polycrystalline Silicon Thin Film Transistor Complementary Metal Oxide Semiconductor Inverters Using Laser Crystallized Channel with High-$k$ and Metal Gate on Si