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Hitachi VLSI Engineering Corporation | 論文
- A Hierarchical Timing Adjuster Featuring Intermittent Measurement for Use in Low-Power DDR SDRAMs
- 0.15μm Gate i-AlGaAs/n-GaAs HIGFET with a 13.3 S/Vcm K-Value (Special Issue on Heterostructure Electron Devices)
- Sub 1V Swing Internal Bus Architecture for Future Low-Power ULSI's (Special Section on the 1992 VLSI Circuits Symposium)
- GaAs Radiation Damage Induced by Electron Cyclotron Resonance Plasma Etching with SF_6/CHF_3
- A 12.5-ns 16-Mb CMOS SRAM with Common-Centroid-Geometry-Layout Sense Amplifiers (Special Section on the 1993 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.29, No.4 April 1994))