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Department Of Physical Electronics Graduate School Of Science And Engineering Tokyo Institute Of Technology | 論文
- Two-Stage Band-Selectable CMOS Power Amplifiers Using Inter-Stage Frequency Tuning
- A Dual-Conduction Class-C VCO for a Low Supply Voltage
- A 24 dB Gain 51-68 GHz Common Source Low Noise Amplifier Using Asymmetric-Layout Transistors
- Inter-Stage Tunable Notch Filter for a Multi-Band WCDMA Receiver
- A Wideband Common-Gate Low-Noise Amplifier Using Capacitive Feedback
- A 24dB Gain 51-68GHz Common Source Low Noise Amplifier Using Asymmetric-Layout Transistors
- An Analysis on a Dynamic Amplifier and Calibration Methods for a Pseudo-Differential Dynamic Comparator
- A 0.5-V, 0.05-to-3.2GHz LC-Based Clock Generator for Substituting Ring Oscillators under Low-Voltage Condition
- Evaluation of L-2L De-Embedding Method Considering Misalignment of Contact Position for Millimeter-Wave CMOS Circuit Design
- A 83-dB SFDR 10-MHz Bandwidth Continuous-Time Delta-Sigma Modulator Employing a One-Element-Shifting Dynamic Element Matching
- Design of Interpolated Pipeline ADC Using Low-Gain Open-Loop Amplifiers
- A 20GHz Push-Push Voltage-Controlled Oscillator Using Second-Harmonic Peaking Technique for a 60GHz Frequency Synthesizer
- A Low-Noise High-Dynamic Range Charge Sensitive Amplifier for Gas Particle Detector Pixel Readout LSIs
- A Study of Stability and Phase Noise of Tail Capacitive-Feedback VCOs
- Design of CMOS Low-Noise Analog Circuits for Particle Detector Pixel Readout LSIs
- A Time-Domain Architecture and Design Method of High Speed A-to-D Converters with Standard Cells
- Evaluation of L-2L De-Embedding Method Considering Misalignment of Contact Position for Millimeter-Wave CMOS Circuit Design
- Ultra-Low-Voltage Dynamic Amplifier
- A 12-bit Interpolated Pipeline ADC Using Body Voltage Controlled Amplifier
- C-12-32 A Current-Reuse Class-C VCO using Dynamic Start-up Circuits