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Department Of Communications And Computer Engineering Kyoto University | 論文
- Observation of One-dimensional Spinodal Decomposition in a Nematic Liquid Crystal(General)
- A Method of Sequential Circuit Synthesis Using One-Hot Encoding for Single-Flux-Quantum Digital Circuits(Superconducting Electronics)
- Logic Synthesis Method for Dual-Rail RSFQ Digital Circuits Using Root-Shared Binary Decision Diagrams(VLSI Design Technology and CAD)
- A Multi-Stage 60GHz CMOS LNA Using Dual Noise-Matching Technique
- 低エネルギー動作に適した超低電圧プロセッサのアーキテクチャ評価
- Synthesis and Characterization of Poly[3]rotaxane through the Mizoroki-Heck Coupling Polymerization of Divinyl-functionalized [3]Rotaxane
- PE-234 Serum Beta2-microglobulin Levels Strongly Predict the Prognosis of Heart Failure in the Very Elderly Patients(Heart failure, clinical-07, The 71st Annual Scientific Meeting of the Japanese Circulation Society)
- Outcome of pediatric patients with Langerhans cell histiocytosis treated with 2 chlorodeoxyadenosine : a nationwide survey in Japan
- AS-1-4 製造ばらつきや環境変動を許容するサブスレッショルド回路設計(AS-1.サブスレッショルドCMOS回路技術,シンポジウムセッション)
- 低エネルギー動作に適した超低電圧プロセッサのアーキテクチャ評価
- レイアウトを考慮した基板バイアスクラスタリング手法(低消費電力設計,システムオンシリコンを支える設計技術)
- サブスレッショルド回路における基板バイアスを考慮したトランジスタのばらつきモデリングとリングオシレータを用いた検証(低消費電力設計,システムオンシリコンを支える設計技術)
- Unruptured pseudoaneurysm of the cystic artery with acute calculous cholecystitis incidentally detected by computed tomography
- Floating-Point Euclidean Norm Computing Circuit
- Digit-Recurrence Algorithm for Computing Reciprocal Square-Root(Regular Section)
- A Hardware Algorithm for Integer Division Using the SD2 Representation(VLSI Design Technology and CAD)
- A VLSI Architecture for Output Probability Computations of HMM-Based Recognition Systems with Store-Based Block Parallel Processing
- Minimum Cut Linear Arrangement of p-q Dags for VLSI Layout of Adder Trees (Special Section on Discrete Mathematics and Its Applications)
- A De-Embedding Method Using Different-Length Transmission Lines for mm-Wave CMOS Device Modeling
- Evaluation of a Multi-Line De-Embedding Technique up to 110GHz for Millimeter-Wave CMOS Circuit Design