Fujii Shosuke | Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, Yokohama 235-8522, Japan
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概要
- Fujii Shosukeの詳細を見る
- 同名の論文著者
- Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, Yokohama 235-8522, Japanの論文著者
関連著者
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Fujii Shosuke
Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, Yokohama 235-8522, Japan
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Yasuda Naoki
Advanced Lsi Technology Laboratory Research & Development Center Toshiba Co.
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Fujiki Jun
Advanced LSI Technology Laboratory, Toshiba Corporation, 8 Shinsugita-cho, Isogo-ku, Yokohama 235-8522, Japan
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Kouichi Muraoka
Advanced LSI Technology Laboratory, Toshiba Corporation, 8 Shinsugita-cho, Isogo-ku, Yokohama 235-8522, Japan
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Koyama Masato
Advanced Lsi Technology Laboratory Corporate R & D Center Toshiba Corporation
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Sakuma Kiwamu
Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, Yokohama 235-8522, Japan
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Oda Masato
Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, Yokohama 235-8522, Japan
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Shosuke Fujii
Advanced LSI Technology Laboratory, Toshiba Corporation, 8 Shinsugita-cho, Isogo-ku, Yokohama 235-8522, Japan
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Jun Fujiki
Advanced LSI Technology Laboratory, Toshiba Corporation, 8 Shinsugita-cho, Isogo-ku, Yokohama 235-8522, Japan
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Naoki Yasuda
Advanced LSI Technology Laboratory, Toshiba Corporation, 8 Shinsugita-cho, Isogo-ku, Yokohama 235-8522, Japan
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Kusai Haruka
Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, Yokohama 235-8522, Japan
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Morota Misako
Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, Yokohama 235-8522, Japan
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Kusai Haruka
Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, Yokohama 235-8522, Japan
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Morota Misako
Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, Yokohama 235-8522, Japan
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Koyama Masato
Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, Yokohama 235-8522, Japan
著作論文
- Re-Examination of Performance and Reliability Degradation in Metal--Oxide--Nitride--Oxide--Semiconductor Memory with Ultrathin SiN Charge Trap Layers
- Direct Measurement of Back-Tunneling Current during Program/Erase Operation of Metal–Oxide–Nitride–Oxide–Semiconductor Memories and Its Dependence on Gate Work Function
- A New Method to Extract the Charge Centroid in the Program Operation of Metal–Oxide–Nitride–Oxide–Semiconductor Memories