Fujieda Shinji | System Devices Research Laboratories, NEC Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
スポンサーリンク
概要
- Fujieda Shinjiの詳細を見る
- 同名の論文著者
- System Devices Research Laboratories, NEC Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japanの論文著者
関連著者
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Terai Masayuki
System Devices Research Laboratories Nec Corp.
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SAITOH Motofumi
System Devices Research Laboratories, NEC Corporation
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Morioka Ayuka
System Devices Research Laboratories Nec Corporation
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Kotsuji Setsu
System Devices Research Laboratories Nec Corporation
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Fujieda Shinji
System Devices Research Laboratories Nec Corp.
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Fujieda Shinji
System Devices Research Laboratories, NEC Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
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IWAMOTO Toshiyuki
System Devices Research Laboratories, NEC Corporation
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Yabe Yuko
System Devices Research Laboratories Nec Corp.
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Ogura Takashi
System Devices And Fundamental Research Nec Corporation
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Saito Yukishige
System Devices Research Laboratories Nec Corp.
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Watanabe Hirohito
System Devices Research Laboratories Nec Corp.
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Terai Masayuki
System Devices Research Laboratories, NEC Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
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Morioka Ayuka
System Devices Research Laboratories, NEC Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
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Saito Yukishige
System Devices Research Laboratories, NEC Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
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Yabe Yuko
System Devices Research Laboratories, NEC Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
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Kotsuji Setsu
System Devices Research Laboratories, NEC Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
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Watanabe Hirohito
System Devices Research Laboratories, NEC Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
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Saitoh Motofumi
System Devices Research Laboratories, NEC Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
著作論文
- Breakdown Mechanisms and Lifetime Prediction for 90-nm-Node Low-Power HfSiON/SiO2 CMOSFETs
- Influence of Charge Traps within HfSiON Bulk on Positive and Negative Bias Temperature Instability of HfSiON Gate Stacks