Takemura Riichiro | Central Research Laboratory, Hitachi, Ltd., 1-280 Higashi-Koigakubo, Kokubunji, Tokyo 185-8601, Japan

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概要

関連著者

NAGAI Ryo
Advanced Device Development Gr., Elpida Memory, Inc.
YAMADA Satoru
Advanced Device Development Gr., Elpida Memory, Inc.
ASAKURA Hisao
Information & Control Systems Division, Computer Systems Quality Assurance Section, Hitachi, Ltd.
Matsuoka Hideyuki
Central Research Laboratory Hitachi Ltd.
Takemura Riichiro
Central Research Laboratory Hitachi Ltd.
Takaura Norikatsu
Central Research Laboratory Hitachi. Ltd.
Matsuoka Hideyuki
Central Research Laboratory, Hitachi, Ltd., 1-280 Higashi-Koigakubo, Kokubunji, Tokyo 185-8601, Japan
Nagai Ryo
Advanced Device Development Gr., Elpida Memory, Inc. 1120 Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
Takemura Riichiro
Central Research Laboratory, Hitachi, Ltd., 1-280 Higashi-Koigakubo, Kokubunji, Tokyo 185-8601, Japan
Asakura Hisao
Information & Control Systems Division, Computer Systems Quality Assurance Section, Hitachi, Ltd., Hitachi System Plaza Shinkawasaki, 890 Komukai Kashimada, Saiwai, Kawasaki, Kanagawa 212-8567, Japan
Yamada Satoru
Advanced Device Development Gr., Elpida Memory, Inc. 1120 Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
Takaura Norikatsu
Central Research Laboratory, Hitachi, Ltd., 1-280 Higashi-Koigakubo, Kokubunji, Tokyo 185-8601, Japan

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著作論文

Eliminating the Threshold-Voltage Offset of p-Channel Metal-Oxide-Semiconductor Field Effect Transistors in High-Density Dynamic Random Access Memory

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