Satake Hideki | Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, 8 Shinsugita-cho, Isogo-ku, Yokohama 235-8522, Japan
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- Satake Hidekiの詳細を見る
- 同名の論文著者
- Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, 8 Shinsugita-cho, Isogo-ku, Yokohama 235-8522, Japanの論文著者
Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, 8 Shinsugita-cho, Isogo-ku, Yokohama 235-8522, Japan | 論文
- Low Gate-Induced Drain Leakage and Its Physical Origins in Si Nanowire Transistors
- Influences of Annealing Temperature on Characteristics of Ge p-Channel Metal Oxide Semiconductor Field Effect Transistors with ZrO2 Gate Dielectrics
- Reconsideration of Hydrogen Release at Ultra Thin Gate Oxide Interface
- Method of Decoupling the Bias Temperature Instability Component from Hot Carrier Degradation in Ultrathin High-$k$ Metal–Oxide–Semiconductor Field-Effect Transistors
- Dependence of Effective Work Function Modulation with Phosphorous Segregation on Ni to Si Ratio in Ni Silicide/SiO2 Systems