Matsunaga Shoun | Center for Spintronics Integrated Systems (CSIS), Tohoku University, Sendai 980-8577, Japan
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概要
- Matsunaga Shounの詳細を見る
- 同名の論文著者
- Center for Spintronics Integrated Systems (CSIS), Tohoku University, Sendai 980-8577, Japanの論文著者
関連著者
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Endoh Tetsuo
Center For Interdisciplinary Research Tohoku University
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Matsunaga Shoun
Center for Spintronics Integrated Systems (CSIS), Tohoku University, Sendai 980-8577, Japan
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IKEDA Shoji
Laboratory for Nanoelectronics and Spintronics, RIEC, Tohoku University
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Ohno Hideo
Laboratory For Electronic Intelligent Systems
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Miura Katsuya
Laboratory For Nanoelectronics And Spintronics Research Institute Of Electrical Communication Tohoku
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HANYU Takahiro
Laboratory for Brainware Systems, Research Institute of Electrical Communication, Tohoku University
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Ohno Hideo
Center For Spintronics Integrated Systems Tohoku University
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Katsumata Akira
Laboratory for Brainware Systems, Research Institute of Electrical Communication, Tohoku University, Sendai 980-8577, Japan
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Hanyu Takahiro
Center for Spintronics Integrated Systems, Tohoku University, Sendai 980-8577, Japan
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Natsui Masanori
Laboratory for Brainware Systems, Research Institute of Electrical Communication, Tohoku University, Sendai 980-8577, Japan
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Matsunaga Shoun
Center for Spintronics Integrated Systems, Tohoku University, Sendai 980-8577, Japan
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Natsui Masanori
Center for Spintronics Integrated Systems, Tohoku University, Sendai 980-8577, Japan
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Ikeda Shoji
Laboratory for Nanoelectronics and Spintronics, Research Institute of Electrical Communication, Tohoku University, 2-1-1 Katahira, Aoba-ku, Sendai 980-8577, Japan
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Hanyu Takahiro
Center for Spintronics Integrated Systems, Tohoku University
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Natsui Masanori
Center for Spintronics Integrated Systems, Tohoku University
著作論文
- Design of a Nine-Transistor/Two-Magnetic-Tunnel-Junction-Cell-Based Low-Energy Nonvolatile Ternary Content-Addressable Memory
- Design and Fabrication of a One-Transistor/One-Resistor Nonvolatile Binary Content-Addressable Memory Using Perpendicular Magnetic Tunnel Junction Devices with a Fine-Grained Power-Gating Scheme