Toyonaga Masahiko | Advanced Lsi Technology Development Center Corporate Semiconductor Development Division Matsushita E
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- TOYONAGA Masahikoの詳細を見る
- 同名の論文著者
- Advanced Lsi Technology Development Center Corporate Semiconductor Development Division Matsushita Eの論文著者
Advanced Lsi Technology Development Center Corporate Semiconductor Development Division Matsushita E | 論文
- A Practical Method for System-Level Bus Architecture Validation (Special Section on VLSI Design and CAD Algorithms)
- WSSA : A High Performance Simulated Annealing and Its Application to Transistor Placement (Special Section on VLSI Design and CAD Algorithms)
- Layout Abstraction and Technology Retargeting for Leaf Cells (Special Section on VLSI Design and CAD Algorithms)
- A Two-Dimensional Transistor Placement Algorithm for Cell Synthesis and Its Application to Standard Cells (Special Section on VLSI Design and CAD Algorithms)