Chen Chia-i | Department Of Electronics Engineering And Institute Of Electronics National Chiao Tung University
スポンサーリンク
概要
- CHEN Chia-Iの詳細を見る
- 同名の論文著者
- Department Of Electronics Engineering And Institute Of Electronics National Chiao Tung Universityの論文著者
関連著者
-
Huang Juinn-dar
Department Of Electronics Engineering And Institute Of Electronics National Chiao Tung University
-
Chen Chia-i
Department Of Electronics Engineering And Institute Of Electronics National Chiao Tung University
-
Chen Chia-i
Department Of Electronics Engineering And The Institute Of Electronics National Chiao Tung Universit
-
Hsu Wan-ling
Department Of Electronics Engineering And Institute Of Electronics National Chiao Tung University
-
Lin Yen-ting
Department Of Electronics Engineering And Institute Of Electronics National Chiao Tung University
-
Huang Juinn-dar
Department Of Electronics Engineering And The Institute Of Electronics National Chiao Tung Universit
-
Jou Jing-yang
Department Of Electronics Engineering And Institute Of Electronics National Chiao Tung University
著作論文
- A Hierarchical Criticality-Aware Architectural Synthesis Framework for Multicycle Communication
- Communication Synthesis for Interconnect Minimization Targeting Distributed Register-File Microarchitecture
- Performance-Driven Architectural Synthesis for Distributed Register-File Microarchitecture with Inter-Island Delay