Liu Shen-iuan | Graduate Institute Of Electronics Engineering & Department Of Electrical Engineering National Ta
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Graduate Institute Of Electronics Engineering & Department Of Electrical Engineering National Ta | 論文
- A Wide-Range Multiphase Delay-Locked Loop Using Mixed-Mode VCDLs(PLL, Analog Circuit and Device Technologies)
- A Fully Integrated 1.7-3.125 Gbps Clock and Data Recovery Circuit Using a Gated Frequency Detector(Papers Selected from AP-ASIC 2004)
- Low-Voltage and Low-Power CMOS Voltage-to-Current Converter(Analog Circuit and Device Technologies)
- A Multi-Band Burst-Mode Clock and Data Recovery Circuit(Analog and Communications,Low-Power, High-Speed LSIs and Related Technologies)
- All-Digital Clock Deskew Buffer with Variable Duty Cycles(Analog Circuit and Device Technologies)