Yang Rong-jyi | Graduate Institute Of Electronics Engineering And Department Of Electrical Engineering National Taiw
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概要
- YANG Rong-Jyiの詳細を見る
- 同名の論文著者
- Graduate Institute Of Electronics Engineering And Department Of Electrical Engineering National Taiwの論文著者
関連著者
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Liu Shen‐iuan
National Taiwan Univ. Taipei Twn
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Liu Shen-iuan
Graduate Institute Of Electronics Engineering & Department Of Electrical Engineering National Ta
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YANG Rong-Jyi
Graduate Institute of Electronics Engineering and the Department of Electrical Engineering, National
-
Yang Rong-jyi
Graduate Institute Of Electronics Engineering And Department Of Electrical Engineering National Taiw
-
Liu Shen-iuan
Graduate Institute Of Electronics Engineering And Department Of Electrical Engineering National Taiw
-
Yang Rong-jyi
Graduate Institute Of Electronics Engineering And The Department Of Electrical Engineering National
-
Liu Shen-iuan
Graduate Institute Of Electronics Engineering And The Department Of Electrical Engineering National
著作論文
- A Wide-Range Multiphase Delay-Locked Loop Using Mixed-Mode VCDLs(PLL, Analog Circuit and Device Technologies)
- A Fully Integrated 1.7-3.125 Gbps Clock and Data Recovery Circuit Using a Gated Frequency Detector(Papers Selected from AP-ASIC 2004)