Kim D | Inter-university Semiconductor Research Center School Of Electrical Engineering Seoul National Unive

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• KIM Dae Hwanの詳細を見る
• 同名の論文著者
• Inter-university Semiconductor Research Center School Of Electrical Engineering Seoul National Univeの論文著者

Inter-university Semiconductor Research Center School Of Electrical Engineering Seoul National Unive | 論文

• Nanoscale Multi-Line Patterning Using Sidewall Structure
• Single-Electron MOS Memory with a Defined Quantum Dot Based on Conventional VLSI Technology
• Single-Electron Transistors with Sidewall Depletion Gates on a Silicon-On-Insulator Nano-Wire
• Single Electron Transistors with Sidewall Depletion Gates on a Silicon-On-Insulator Nano-Wire
• Single Electron Memory with a Defined Poly-Si Dot Based on Conventional VLSI Technology

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