Shirota R | Microelectronics Engineering Lab. Toshiba
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概要
Microelectronics Engineering Lab. Toshiba | 論文
- New Write/Erase Operation Technology for Flash EEPROM Cells to Improve the Read Disturb Characteristics
- New Reduction Mechanism of the Stress Leakage Current Based on the Deactivation of Step Tunneling Sites for Thin Oxide Films
- A Novel Programming Method Using a Reverse Polarity Pulse in Flash EEPROMs (Special Issue on ULSI Memory Technology)
- Data Retention Characteristics of Flash Memory Cells after Write and Erase Cycling (Special Section on High Speed and High Density Multi Functional LSI Memories)
- An Advanced NAND-Structure Cell Technology for Reliable 3.3 V 64 Mb Electrically Erasable and Programmable Read Only Memories (EEPROMs)