Nara Yasuo | Research Dept. 1 Semiconductor Leading Edge Technologies (selete) Inc.
スポンサーリンク
概要
- NARA Yasuoの詳細を見る
- 同名の論文著者
- Research Dept. 1 Semiconductor Leading Edge Technologies (selete) Inc.の論文著者
Research Dept. 1 Semiconductor Leading Edge Technologies (selete) Inc. | 論文
- High Quality Hf-Silicate Gate Dielectrics Fabrication by Atomic Layer Deposition (ALD) Technology
- Production-Worthy HfSiON Gate Dielectric Fabrication Enabling EOT Scalability Down to 0.86nm and Excellent Reliability by Polyatomic Layer Chemical Vapor Deposition Technique
- Extended Scalability of HfON/SiON Gate Stack Down to 0.57 nm Equivalent Oxide Thickness with High Carrier Mobility by Post-Deposition Annealing
- Improvements of Electrical Properties with Reduced Transient-Enhanced-Diffusion for 65nm-node CMOS Technology using Flash Lamp Annealing
- Ni-Salicided Poly-Si/poly-SiGe-Layered Gate Technology for 65-nm-node CMOSFETs