Takeda T | Ntt System Electronics Lab. Atsugi‐shi Jpn
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概要
Ntt System Electronics Lab. Atsugi‐shi Jpn | 論文
- An Effective Routing Methodology for Gb/s LSIs Using Deep-Submicron Technology
- A Fully Depleted CMOS/SIMOX LSI Scheme Using a LVTTL-Compatible and Over-2,000-V ESD-Hardness I/O Circuit for Reduction in Active and Static Power Consumption (Special Issue on SOI Devices and Their Process Technologies)
- A 40-Gb/s 8×8 ATM Switch LSI Using 0.25-μm CMOS/SIMOX(Special Issue on Multimedia, Network, and DRAM LSIs)
- A High-Performance Multicast Switch and Its Feasibility Study
- A 2.6-Gbps/pin SIMOX-CMOS Low-Voltage-Swing Interface Circuit (Special Issue on Ultra-High-Speed LSIs)