Matsuyama N | Toyama Prefectural Univ. Toyama‐ken Jpn
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概要
Toyama Prefectural Univ. Toyama‐ken Jpn | 論文
- Instruction-Level Power Estimation Method by Considering Hamming Distance of Registers(Selected Papers from the 16th Workshop on Circuits and Systems in Karuizawa)
- A Leakage Reduction Scheme for Sleep Transistors with Decoupling Capacitors in the Deep Submicron Era(Electronic Circuits)
- Architecture and Performance Evaluation of a New Functional Memory : Functional Memory for Addition (Special Section on VLSI Design and CAD Algorithms)
- A Real-Time Low-Rate Video Compression Algorithm Using Multi-Stage Hierarchical Vector Quantization (Special Section on VLSI for Digital Signal Processing)
- An LSI for Low Bit-Rate Image Compression Using Vector Quantization(Special Issue on Multimedia, Network, and DRAM LSIs)