DOI Nobuhiro | Graduate School of Information, Production and Systems, Waseda University

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概要

• 同名の論文著者
• Graduate School of Information, Production and Systems, Waseda Universityの論文著者

関連著者

• 堀山 貴史

  埼玉大学情報システム工学科

• KIMURA Shinji

  Graduate School of Information Science, Nara Institute of Science and Technology

• Kimura Shinji

  Graduate School Of Information Production And Systems Waseda University

• Kimura S

  Waseda Univ. Kitakyushu‐shi Jpn

• HORIYAMA Takashi

  Graduate School of Science and Engineering, Saitama University

• NAKANISHI MASAKI

  Graduate School of Information Science, NAIST

• Horiyama Takashi

  Graduate School Of Engineering Kyoto University

• DOI Nobuhiro

  Graduate School of Information, Production and Systems, Waseda University

• Doi Nobuhiro

  Graduate School Of Information Production And Systems Waseda University

• Doi Naoshi

  Graduate School Of Information Production And Systems Waseda University

• Nakanishi Masaki

  The Graduate School Of Information Science Nara Institute Of Science And Technology

• Nakanishi Masaki

  Graduate School Of Information Science Nara Institute Of Science And Technology

• Nakanishi Masaki

  Nara Inst. Sci. And Technol. Ikoma‐shi Jpn

• Kohara Shunitsu

  Department Of Computer Science Waseda University

• NAKANISHI Masaki

  Yamagata University

• Kimura Shinji

  Graduate School Of Engineering Nagoya University

• 堀山 貴史

  京都大学大学院情報学研究科

• WATANABE Katsumasa

  Graduate School of Information Science, Nara Institute of Science and Technology

• 堀山 貴史

  埼玉大学

• WATANABE Kaoru

  The author is with Osaka Electro-Communication University

• HORIYAMA Takashi

  Saitama University

• Horiyama Takashi

  Graduate School Of Informatics Kyoto University

• Watanabe Katsumasa

  Graduate School Of Information Science Nara Institute Of Science And Technology

• Watanabe K

  Graduate School Of Information Science Nara Institute Of Science And Technology

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著作論文

• Bit Length Optimization of Fractional Part on Floating to Fixed Point Conversion for High-Level Synthesis(Logic and High Synthesis)(VLSI Design and CAD Algorithms)
• Bit-Length Optimization Method for High-Level Synthesis Based on Non-linear Programming Technique(System Level Design,VLSI Design and CAD Algorithms)

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