Chan Lap-hung | Department Of Technology Development Chartered Semiconductor Manufacturing Ltd.
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概要
関連著者
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Lau Wai-shing
School Of Electrical And Electronic Engineering Nanyang Technological University
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Tee Kian-meng
Department Of Technology Development Chartered Semiconductor Manufacturing Ltd.
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Chan Lap-hung
Department Of Technology Development Chartered Semiconductor Manufacturing Ltd.
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Quek Elgin
Department Of Technology Development Chartered Semiconductor Manufacturing Ltd.
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SEE Kwang-Seng
School of Electrical and Electronic Engineering, Nanyang Technological University
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LIAO Hong
Department of Technology Development, Chartered Semiconductor Manufacturing Ltd
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TEE Kheng-Chok
Department of Technology Development, Chartered Semiconductor Manufacturing Ltd
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LEE Jae
Department of Metallurgy, The University of Tokyo
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Lee Jae
Department Of Technology Development Chartered Semiconductor Manufacturing Ltd
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Lee Jae
Department Of Acupuncture & Moxibustion College Of Oriental Medicine
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See Kwang-seng
School Of Electrical And Electronic Engineering Nanyang Technological University
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Liao Hong
Department Of Technology Development Chartered Semiconductor Manufacturing Ltd
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Tee Kheng-chok
Department Of Technology Development Chartered Semiconductor Manufacturing Ltd
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Chan Lap-hung
Department Of Technology Development Chartered Semiconductor Manufacturing Ltd
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Quek Elgin
Department Of Technology Development Chartered Semiconductor Manufacturing Ltd
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Li Kun
Department Of Biological Engineering College Of Environment & Chemical Engineering Yanshan Unive
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Li Kun
Department Of Applied Physics And Materials Research Center The Hong Kong Polytechnic University
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TOH Suey-Li
Department of Chemistry, National University of Singapore
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ENG Chee-Wee
School of Electrical and Electronic Engineering, Nanyang Technological University
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Toh Suey-li
Department Of Chemistry National University Of Singapore
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Li Kun
Department Of Technology Development Chartered Semiconductor Manufacturing Ltd
著作論文
- Reduced Hot-Carrier Induced Degradation of NMOS I/O Transistors with Sub-micron Source-Drain Diffusion Length for 0.11μm Dual Gate Oxide CMOS Technology
- Reduced Hot-Carrier Induced Degradation of NMOS I/O Transistors with Sub-micron Source-Drain Diffusion Length for 0.11μm Dual Gate Oxide CMOS Technology
- Effective Channel Length Shortening and Mobility Increase of p-Channel Metal Oxide Semiconductor Transistors Resulting in Higher Drive Current Using Short Source-Drain Diffusion Length