Maeda Takeshi | Research Department 1 Semiconductor Leading Edge Technologies Inc. (selete)
スポンサーリンク
概要
関連著者
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Muto Akiyoshi
Research Department 1 Semiconductor Leading Edge Technologies Inc. (selete)
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Maeda Takeshi
Research Department 1 Semiconductor Leading Edge Technologies Inc. (selete)
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Ohji Hiroshi
Research Department 1 Semiconductor Leading Edge Technologies Inc. (selete)
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TORII Kazuyoshi
Research Department 1, Semiconductor Leading Edge Technologies, Inc. (SELETE)
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KITAJIMA Hiroshi
Research Dept. 1, Semiconductor Leading Edge Technologies (Selete), Inc.
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Kitajima Hiroshi
Research Dept. 1 Semiconductor Leading Edge Technologies (selete) Inc.
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Ohji Hiroshi
Research Department 1, Semiconductor Leading Edge Technologies, Inc. (SELETE), 34 Miyukigaoka, Tsukuba-shi, Ibaraki-ken 305-8501, Japan
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Maeda Takeshi
Research Department 1, Semiconductor Leading Edge Technologies, Inc. (SELETE), 34 Miyukigaoka, Tsukuba-shi, Ibaraki-ken 305-8501, Japan
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Muto Akiyoshi
Research Department 1, Semiconductor Leading Edge Technologies, Inc. (SELETE), 34 Miyukigaoka, Tsukuba-shi, Ibaraki-ken 305-8501, Japan
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Kitajima Hiroshi
Research Department 1, Semiconductor Leading Edge Technologies, Inc. (SELETE), 34 Miyukigaoka, Tsukuba-shi, Ibaraki-ken 305-8501, Japan
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Torii Kazuyoshi
Research Department 1, Semiconductor Leading Edge Technologies, Inc. (SELETE), 34 Miyukigaoka, Tsukuba-shi, Ibaraki-ken 305-8501, Japan
著作論文
- Ni-Salicided Poly-Si/poly-SiGe-Layered Gate Technology for 65-nm-node CMOSFETs
- Ni-Salicided Poly-Si/poly-SiGe-Layered Gate Technology for 65-nm-node CMOSFETs