Kim Sung | Semiconductor R&d Center Samsung Electronics Co. Ltd.
スポンサーリンク
概要
関連著者
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Kim Sung
Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Lee Moon
Semiconductor R&d Center Samsung Electronics Co. Ltd
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Park Moon
Senliconductor R&d Center Samsung Electronics Co. Ltd.
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Park Moon
Semiconductor Division Electronics And Telecommunications Research Institute
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Lee Moon
Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Kang H
Samsung Electronics Co. Ltd. Kyungki‐do Kor
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KANG Ho
Semiconductor R&D Center, Samsung Electronics Co., Ltd.
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Park Tai-su
Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Roh Yonghan
School Of Electrical And Computer Engineering Sungkyunkwan University
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Shin Y
Department Of Materials Science And Engineering
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LEE Han
Semiconductor R&D Center, Samsung Electronics Co., Ltd.
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SHIN Yu
Semiconductor R&D Center, Samsung Electronics Co., Ltd.
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Lee Han
Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Kang Ho
Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Oh Chang
Semiconductor Physics Research Center Department Of Semiconductor Science And Technology Chonbuk Nat
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Kim Dong-Won
Semiconductor R&D Center, Samsung Electronics Co., Ltd., Hwasung, Gyeonggi 445-701, Korea
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Oh Chang
Semiconductor R&D Center, Samsung Electronics Co., Ltd., Hwasung, Gyeonggi 445-701, Korea
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Bae Hyun
Semiconductor R&D Center, Samsung Electronics Co., Ltd., Hwasung, Gyeonggi 445-701, Korea
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Yamada Satoru
Semiconductor R&D Center, Samsung Electronics Co., Ltd., Hwasung, Gyeonggi 445-701, Korea
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Jin Gyoyoung
Semiconductor R&D Center, Samsung Electronics Co., Ltd., Hwasung, Gyeonggi 445-701, Korea
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Jin Gyoyoung
Semiconductor R&D Center, Samsung Electronics Co., Ltd., Hwasung, Gyeonggi 445-701, Korea
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Yamada Satoru
Semiconductor R&D Center, Samsung Electronics Co., Ltd., Hwasung, Gyeonggi 445-701, Korea
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Bae Hyun
Semiconductor R&D Center, Samsung Electronics Co., Ltd., Hwasung, Gyeonggi 445-701, Korea
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Roh Yonghan
School of Information and Communication Engineering, Sungkyunkwan University, Suwon, Gyeonggi 440-746, Korea
著作論文
- A Novel LOCOS-Trench Combination Isolation Method for Maximum Chemical Mechanical Polishing(CMP) Process Window
- Advanced 10 nm Width Silicon-on-Insulator Tri-Gate Transistors with NO Annealing of Gate Oxide Using Optimized Novel Silicon-on-Insulator Realization Technology