KIM Eun-Soo | LDI Process Architecture, LSI Development Team, SYSTEM-LSI Division, Semiconductor Business, Samsung
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概要
- 同名の論文著者
- LDI Process Architecture, LSI Development Team, SYSTEM-LSI Division, Semiconductor Business, Samsungの論文著者
関連著者
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Kim Min-soo
Memory R & D Division Hyundai Electronics Industries Co. Ltd.
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Park Joo-han
Lsi Process Architecture Lsi Development Team System-lsi Division Samsung Electronics Co. Ltd.
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Park J‐h
Advanced Technology Development Team Memory Division Semiconductor Business Samsung Electronics Co.
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Kim E‐s
Samsung Electronics Co. Ltd. Kyungki‐do Kor
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Kim Eun-san
Pohang Accelerator Laboratory Pohang University Of Science And Technology (postech)
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KIM Seong-Ho
LDI Process Architecture, LSI Development Team, SYSTEM-LSI Division, Semiconductor Business, Samsung
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KIM Sung-Hoan
LDI Process Architecture, LSI Development Team, SYSTEM-LSI Division, Semiconductor Business, Samsung
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KIM Sung-Eun
LDI Process Architecture, LSI Development Team, SYSTEM-LSI Division, Semiconductor Business, Samsung
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KIM Myung-Soo
LDI Process Architecture, LSI Development Team, SYSTEM-LSI Division, Semiconductor Business, Samsung
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PARK Joo-Han
LDI Process Architecture, LSI Development Team, SYSTEM-LSI Division, Semiconductor Business, Samsung
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KIM Eun-Soo
LDI Process Architecture, LSI Development Team, SYSTEM-LSI Division, Semiconductor Business, Samsung
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Kim Myung-soo
Ldi Process Architecture Lsi Development Team System-lsi Division Semiconductor Business Samsung Ele
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Park June-hyoung
Center For Near-field Atom-photon Technology Seoul National University
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Kim S‐h
Lsi Process Architecture Lsi Development Team System-lsi Division Samsung Electronics Co. Ltd.
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Park J‐g
Pohang Univ. Sci. And Technol. Pohang Kor
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Kim Seong-ho
Ldi Process Architecture Lsi Development Team System-lsi Division Semiconductor Business Samsung Ele
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Kim Jin-tae
Ldi Process Architecture Lsi Development Team System-lsi Division Semiconductor Business Samsung Ele
著作論文
- Process Design for Preventing the Gate Oxide Thinning in the Integration of Dual Gate Oxide Transistor
- New STI Scheme to Compensate Gate Oxide Thinning at STI Corner Edge for the Devices Using Thick Dual Gate Oxide