Yu Shao-ming | Department Of Computer And Information Science National Chiao Tung University
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概要
- YU Shao-Mingの詳細を見る
- 同名の論文著者
- Department Of Computer And Information Science National Chiao Tung Universityの論文著者
関連著者
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Yu Shao-ming
Department Of Computer And Information Science National Chiao Tung University
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Li Yiming
Department Of Communication Engineering National Chiao Tung University
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LI Yiming
Department of Nano Device Technology, National Nano Device Laboratories
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YU Shao-Ming
Department of Computer and Information Science, National Chiao Tung University
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Lee Jam-wem
Department Of Computational Nanoelectronics National Nano Device Laboratories
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LEE Jam-Wem
Microelectronics and Information Systems Research Center, National Chiao Tung University
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Yu Shao-ming
Department Of Computer Science National Chiao Tung University
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Li Y
National Nano Device Labs. Hsinchu Twn
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Yu Shao-Ming
Department of Computer and Information Science, National Chiao Tung University, 1001 Ta-Hsueh Rd., Hsinchu 300, Taiwan
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Yu Shao-Ming
Department of Computer and Information Science, National Chiao Tung University, P.O. BOX 25-178, 1001 Ta-hsueh Rd., Hsinchu City, Hsinchu 300, Taiwan
著作論文
- A Quantum Mechanical Corrected SPICE Model for Ultrathin Oxide MOSFETs' Gate Tunneling Current Simulation
- Comparison of Random-Dopant-Induced Threshold Voltage Fluctuation in Nanoscale Single-, Double-, and Surrounding-Gate Field-Effect Transistors
- A Two-Dimensional Quantum Transport Simulation of Nanoscale Double-Gate MOSFETs Using Parallel Adaptive Technique(Scientific and Engineering Computing with Applications)(Hardware/Software Support for High Performance Scientific and Engine
- Quantum Mechanical Corrected Simulation Program with Integrated Circuit Emphasis Model for Simulation of Ultrathin Oxide Metal-Oxide-Semiconductor Field Effect Transistor Gate Tunneling Current
- Comparison of Threshold Voltage Fluctuations in Sub-45nm Planar MOSFET and Thin-Buried-Oxide SOI Devices
- Comparison of Random-Dopant-Induced Threshold Voltage Fluctuation in Nanoscale Single-, Double-, and Surrounding-Gate Field-Effect Transistors